Energy efficient FPGA accelerators for emerging big data applications

Start Date and End Date

01 March 2016
28 February 2018

Turkish Partner(s)

İhsan Doğramacı Bilkent University

Coordinator

Dr. Mustafa ÖZDAL

Budget

157,845 Euro

Programme

Horizon 2020 Marie-Curie

Project Web Page

Scientific Outputs

The basic idea is to use an abstract interface that allows a domain expert to describe an application as a set of serial functions defined per vertex and/or edge.

Tackling ‘grand’ or societal challenges

Today, prominent hardware and software companies are investing in data center solutions that integrate FPGAs with CPUs, and significant energy consumption and performance improvements have been demonstrated for several data center applications. The main barrier for wide spread adoption of FGPAs in data centers is the cost of programming, which typically requires months of development time by hardware designers. This makes it unaffordable for small-to-medium software companies to effectively utilize the available FPGAs. The purpose of this project is to lower this barrier for emerging graph analytics applications for knowledge discovery and machine learning.

Industrial Innovation (including innovation in services as well as products and processes)

The purpose of this project is to lower the cost for emerging graph analytics applications for knowledge discovery and machine learning.

Research-influenced changes in policy, agenda-setting

According to a recent NRDC report, the worldwide electricity consumption of data centers is as much as the electricity consumption of the whole countries such as Spain or Italy. Running some of the compute-intensive tasks on customized hardware such as FPGAs can significantly reduce the energy requirements. 

The provision of Improved Public Goods

The proposed template will hide from users many low level implementation details such as parallelization, pipelining, synchronization, memory access optimization, race and deadlock avoidance, etc. This will help bridge the gap between high level application descriptions and costly hardware implementations.

The improved exercise of professional skill

The proposed template will hide from users many low level implementation details such as parallelization, pipelining, synchronization, memory access optimization, race and deadlock avoidance, etc. This will help bridge the gap between high level application descriptions and costly hardware implementations. Our preliminary architecture simulations have shown that the proposed graph processors can achieve significantly better energy efficiency than general purpose processors.

Human capital development

The goal is to enhance the creative and innovative potential of experienced researchers at all career levels by creating opportunities for cross-border and cross-sector mobility. Key activities shall be to encourage experienced researchers to broaden or deepen their skills by means of mobility by opening attractive career opportunities in universities, research institutions, research infrastructures, businesses, SMEs and other socio-economic groups all over Europe and beyond.